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Formal Methods in Computer-Aided Design(计算机辅助设计中的形式方法/会议录)书籍详细信息

  • ISBN:3540237380
  • 作者:暂无作者
  • 出版社:暂无出版社
  • 出版时间:2007-12
  • 页数:444
  • 价格:596.60
  • 纸张:胶版纸
  • 装帧:平装
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  • 更新时间:2025-01-19 23:08:15

内容简介:

This book constitutes the refereed proceedings of the 5th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2004, held in Austin, Texas, USA in November 2004.

The 29 revised full papers presented together with the abstract of an invited talk were carefully reviewed and selected from 69 submissions. The papers address all current issues on tools, methods, algorithms, and foundational theory for the application of formalized reasoning to all aspects of computer-aided systems design, including specification, verification, synthesis, and testing.


书籍目录:

Challenges in System-Level Design

Generating Fast Multipliers Using Clever Circuits

Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques

A Methodology for the Formal Verification of FFT Algorithms in HOL ..

A Fhnctional Approach to the Formal Specification of Networks on Chip.

Proof Styles in Operational Semantics

Integrating Reasoning About Ordinal Arithmetic into ACL2

Combining Equivalence Verification and Completion ~nctions

Synchronization-at-Retirement for Pipeline Verification

Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs

Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders

Scalable Automated Verification via Expert-System Guided Transformations

Simple Yet Efficient Improvements of SAT Based Bounded Model Checking

Simple Bounded LTL Model Checking

QuBE++: An Efficient QBF Solver

Bounded Probabilistic Model Checking with the Mur Verifier

Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States

Bounded Verification of Past LTL

A Hybrid of Counterexample-Based and Proof-Based Abstraction

Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis

Approximate Symbolic Model Checking for Incomplete Designs

Extending Extended Vacuity

Parameterized Vacuity

An Operational Semantics for Weak PSL

Accepting Predecessors Are Better than Back Edges in Distributed LTL Model-Checking

Bloom Filters in Probabilistic Verification

A Simple Method for Parameterized Verification of Cache Coherence Protocols

……

Author Index


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